feat(detectors): add Qualcomm Hexagon NPU support (community board)

Add a community-supported board build for Qualcomm SoCs with a Hexagon
NPU, accelerating TFLite object detection through the QNN TFLite delegate
on the Hexagon Tensor Processor (HTP).

Supported boards:
- IQ9100 (IQ-9075 EVK)
- QCS6490 (RB3 Gen 2 Vision Kit / Rubik Pi 3)

- detector: new `qualcomm_tfl` plugin loading libQnnTFLiteDelegate.so on
  the HTP backend, reusing the shared TFLite delegate helpers
- docker: `docker/qualcomm` board build (Dockerfile, qualcomm.hcl,
  qualcomm.mk) producing the arm64 `-qualcomm` image
- cdi: per-board Container Device Interface descriptors and an install
  helper exposing the NPU device nodes and QNN libraries to the container
- ci/codeowners: register the qualcomm build target and code owner
- docs: installation, hardware, and object detector documentation, using
  the shared model config dropdown component
- i18n: add the Qualcomm detector label and description to the generated
  en config locale

Signed-off-by: Rami Mouro <rmouro@qti.qualcomm.com>

web/public/locales/en/config/global.json

@@ -413,6 +413,10 @@
         "description": "The device to use for OpenVINO inference (e.g. 'CPU', 'GPU', 'NPU')."
       }
     },
+    "qualcomm_tfl": {
+      "label": "Qualcomm",
+      "description": "Qualcomm NPU detector using the QNN TFLite delegate to accelerate inference on Qualcomm SoCs with a Hexagon NPU (e.g. IQ9100, QCS6490)."
+    },
     "rknn": {
       "label": "RKNN",
       "description": "RKNN detector for Rockchip NPUs; runs compiled RKNN models on Rockchip hardware.",